A key challenge of integrating high-k / metal gates is the plasma etching of the gate stack. Results from etching of dual work function band-edge CMOS logic gates will be presented, demonstrating the feasibility of “gate first” integration. Plasma etching results on blanket and patterned mid-gap metal gate stacks will also be presented, illustrating how the fundamentals of plasma chemistry and ion-enhanced etching can be used to develop new plasma processes enabling integration of novel gate stack materials.
*This work was sponsored by the Air Force under contract #FA8721-05-C-0002. Opinions, interpretations, conclusions, and recommendations are those of the author and are not necessarily endorsed by the United States Government.