- 3:45 PM
696b

All Additive Ink Jet Printed Backplanes for Flexible Displays

Ana Claudia Arias1, Jürgen Daniel2, Brent Krusor3, Veronica Sholin2, Fred Endicott2, René Lujan2, and Street Robert2. (1) Electronic Materials and Devices Laboratory, Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304, (2) Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304, (3) EMDL, Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304

We are developing processes to fabricate TFT backplanes on flexible substrates using ink jet printing as the only patterning method. In order to achieve good performance and keep the low thermal budget required by flexible substrates a combination of organic and inorganic materials is used in the fabrication process. Polymeric semiconductors, metal nanoparticles and low temperature dielectric layers were integrated to form arrays of thin film transistors to be used as drivers of electronic paper. We study the film formation process of metal nanoparticles deposited from solution and discuss issues of line formation, surface energy control and morphology of these materials. We show that silver nanoparticles exhibit conductivities high enough to be used as addressing lines on display backplanes at temperatures as low as 150 °C. The semiconducting polymer films used are polythiophene derivatives, P3HT and PQT-12, and were self-encapsulated by depositing the semiconductor blended with an insulating polymer from solution. The morphology of the phase separated film was controlled so that the insulator material segregates to the top surface encapsulating the underlying semiconductor. Bottom gate TFTs were fabricated with blends of semiconducting and insulating polymers at different concentrations and mobilities as high as 0.05 cm2/Vs were obtained. TFT devices were operated in air and showed stable sub-threshold voltages up to 21 days in air. The self-encapsulating process also improves the integration of printed TFT backplanes with display media. Finally, we discuss the challenges of integrating low temperature dielectric layers to printed processes. We show that pixel design benefits from the registration accuracy of jet-printing and that the electrical performance is suitable for addressing capacitive media displays.